Silicon-based Photonic Analog Signal Processing Engines with Reconfigurability (Si-PhASER)

The summary for the Silicon-based Photonic Analog Signal Processing Engines with Reconfigurability (Si-PhASER) Federal Grant is detailed below. It contains information such as the Catalog of Federal Domestic Assistance (CFDA) number, who is eligible for the grant, how much grant money will be awarded, important deadlines, and a sampling of similar government grants. Verify the accuracy of the data FederalGrants.com provides by visiting the webpage noted in the Link to Full Announcement section or by contacting the appropriate person listed in the Grant Announcement Contact section. If these sections are incomplete, please visit the website of the government agency that is offering this grant.


	Federal Grant Title:	Silicon-based Photonic Analog Signal Processing Engines with Reconfigurability (Si-PhASER)
	CFDA Number:	12.910
	CFDA Description:	Research and Technology Development
	Federal Agency Name:	DARPA Microsystems Technology Office
	Category of Funding Activity:	Science and Technology
	Category Explanation:	Information not provided
	Opportunity Category:	Discretionary
	Funding Opportunity Number:	DARPA-BAA-08-38
	Document Type:	Modification to Previous Grants Notice
	Funding Instrument Type:	Cooperative Agreement Grant Other Procurement Contract
	Posted Date:	May 30, 2008
	Creation Date:	Apr 16, 2009
	Original Closing Date for Applications:	May 30, 2009 Proposal Due Date: July 14, 2008
	Current Closing Date for Applications:	Jun 01, 2009 Proposal Due Date: July 14, 2008
	Archive Date:	Jun 30, 2009
	Expected Number of Awards:	Information not provided
	Estimated Total Program Funding:	Information not provided
	Federal Grant Award Ceiling:	$0
	Federal Grant Award Floor:	$0
	Cost Sharing or Matching Requirement:	No

Applicants Eligible for this Grant: Unrestricted (i.e., open to any type of entity above), subject to any clarification in text field entitled "Additional Information on Eligibility"
Additional Information on Eligibility: Information not provided
Grant Description: The purpose of this modification is to change the close date from 05/30/2009 to 06/01/2009. Original Description Below. DARPA is soliciting innovative research and development (R&D) proposals in the area of Silicon-based Photonic Analog Signal Processing Engines with Reconfigurability (Si-PhASER). The overall goal is the creation of novel silicon Photonic Integrated Circuit (PIC) elements and associated programmable filter array concepts, which can be fabricated in a CMOS-compatible process, and that enable high-throughput, low-power signal processors which overcome the limits of conventional electronic DSP technology. All administrative correspondence and questions on this solicitation, including requests for information on how to submit a proposal abstract or full proposal to this BAA, should be directed to BAA08-38@darpa.mil. See full BAA document attached.
Link to Full Grant Announcement: http://www.darpa.mil/baa/#eto
Grant Announcement Contact: Dr. Michael Haney ATTN: DARPA-BAA-08-38 FAX: 703-696-2206
BAA Coordinator [BAA08-38@darpa.mil]
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