NIST Consortium/Consortia for Post-Complementary Metal Oxide Semiconductor (CMOS) Nanoelectronics Research Program

The summary for the NIST Consortium/Consortia for Post-Complementary Metal Oxide Semiconductor (CMOS) Nanoelectronics Research Program grant is detailed below. This summary states who is eligible for the grant, how much grant money will be awarded, current and past deadlines, Catalog of Federal Domestic Assistance (CFDA) numbers, and a sampling of similar government grants. Verify the accuracy of the data FederalGrants.com provides by visiting the webpage noted in the Link to Full Announcement section or by contacting the appropriate person listed as the Grant Announcement Contact. If any section is incomplete, please visit the website for the Department of Commerce, which is the U.S. government agency offering this grant.
NIST Consortium/Consortia for Post-Complementary Metal Oxide Semiconductor (CMOS) Nanoelectronics Research Program: The National Institute of Standards and Technology (NIST) seeks to work with a consortium or consortia to fund basic research in the field of nanoscale electronics focused on developing the next logic switch beyond CMOS.NIST seeks research and development (R&D) partnerships that promote directed basic research at universities focused on the long-term research needs of industry in specific technological sectors important for U.S. economic competitiveness. One area where a clear long-term technological challenge resides is in the development of new semiconductor technology. Within 10-15 years the semiconductor industry will approach the limits of existing complementary metal oxide semiconductor (CMOS) technology, as atomic-scale barriers limit the density of components that can be placed on a single chip. The semiconductor industry is well aware of this barrier, and through the International Technology Roadmap for Semiconductors (ITRS) has identified research on post-CMOS technologies as a high priority. In particular, the field of nanoscale electronics presents a number of promising research alternatives. NIST seeks to support a program of one or more projects that involves an industry-led partnership that can include commercial, academic, non-profit, and/or government organizations to address the technical challenges highlighted in the ITRS roadmap, including the characterization and measurement issues inherent in the use of nanoscale electronics to develop the next logic switch beyond CMOS. The program is expected to leverage Federal financial support with that of other partners from industry to fund research at universities. Through the formation of a formal competitive process within a partnership (hereinafter called "the consortium"), a funded consortium is expected to create a process for the review, selection, award and monitoring of research awards to universities to be made by the consortium in support of addressing the technical challenges associated with nanoscale electronics and the development of the next logic switch beyond CMOS. The technical scope of the consortium should explore fundamentally new approaches to circumvent the inherent thermal limitations for switches based on charge transfer (such as CMOS). The next switch must be energy efficient, scalable, be capable of high performance, reliable, be able to operate at room temperature, and be highly integratable into current architectures. Preferably, it should be CMOS compatible and be architecturally compatible with CMOS architecture. Some of the alternative state variables that are under consideration include spin state, material phase, molecular configuration and strongly correlated electron state such as multiferroics. Proposals for this agreement must be submitted by a single legal entity that will act as the recipient of any Federal funds, and be responsible for managing the agreement on behalf of the other consortium members. Applicants applying for funding should: provide details on the membership of the consortium; show that the consortium has a shared technological vision and will addresses the long-term (10-15 years) basic research needs of industry; describe the mechanism used by the consortium to determine research focus areas and disperse funding (including: scopes of work and budgets for each proposed project year, how availability of funds will be announced, who will be eligible to receive funding, what evaluation criteria will be applied to proposals, a description of the selection process, and mechanisms for avoiding conflict of interest); detail the amount and type of industry support available for university-based research in terms of funds, personnel, and equipment available. As part of the jointly pursued activities under this cooperative agreement, NIST will be involved in the project selection and funding decisions of the consortium, both in the form of technical expertise, and as an equal and contributing partner to the mechanism used by the consortium to make funding decisions. NIST will also provide technical expertise and the opportunity for research collaborations focused on specific research issues related to the metrology and characterization of nanoscale components.
Federal Grant Title: NIST Consortium/Consortia for Post-Complementary Metal Oxide Semiconductor (CMOS) Nanoelectronics Research Program
Federal Agency Name: Department of Commerce
Grant Categories: Science and Technology
Type of Opportunity: Discretionary
Funding Opportunity Number: 2007-EEEL-01
Type of Funding: Cooperative Agreement
CFDA Numbers: 11.609
CFDA Descriptions: Measurement and Engineering Research and Standards
Current Application Deadline: No deadline provided
Original Application Deadline: Jun 04, 2007 Complete Applications must be receiv
Posted Date: May 03, 2007
Creation Date: May 03, 2007
Archive Date: Jul 04, 2007
Total Program Funding: $3,000,000
Maximum Federal Grant Award:
Minimum Federal Grant Award:
Expected Number of Awards: 2
Cost Sharing or Matching: Yes
Applicants Eligible for this Grant
Others (see text field entitled "Additional Information on Eligibility" for clarification)
Additional Information on Eligibility
The NIST Consortium/Consortia for Post-CMOS Nanoelectronics Research Program is open to any industry-led consortium consisting of any number of commercial organizations; institutions of higher education; nonprofit organizations; and/or units of state, local, and/or Indian tribal governments. Tax-exempt organizations formed under 26 U.S.C. § 501(c)(4) are ineligible for this program if they engage in lobbying as defined in the Lobbying Disclosure Act of 1995, 2 U.S.C. §§ 1601-1607. The managing entity of the consortium must be a legal entity based in the United States.
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